PURPOSE: To dynamically decide a register allocation mode and to secure the same processing logic despite the different architectures of target machines by setting up the flags in accordance with the register Nos in a register retrieving list corresponding to the registers which are used for each phase.

CONSTITUTION: In a phase of the local allocation 201, the flags are set on the register Nos '0' - '3'. In a phase of the global allocation 202, the flags are set on the register Nos 'N-2' - '4' respectively. Furthermore the flags are set on the register Nos '0' - 'N' in a phase of the transient allocation 203. Then the Nos '0', '3', 'N-2', '4', '0', 'N', and an inapplicable register No are described on (1), (2), (3), (4), (5), (6) and (7) of a register distribution table 40 respectively in response to those flag set-up states. In such a way, the number of registers used in each phase is dynamically decided and the same processing logic is secured for a compiler.