PURPOSE: To improve the processing speed of a branch instruction by deciding branch when data is transferred to an operating device if branch cannot be decided in the decoding cycle of the branch instruction.

CONSTITUTION: When one instruction is stored in an instruction register 107 from a storage device through a line 201, the instruction code part is sent to a decoder 108 through a line 205. The decoder 108 tests whether various decoding suppression conditions are provided or not; and even if one decoding suppression condition is presented, decoding of the instruction is held. When suppression conditions disappear, conditions of decoding are satisfied, and the control advances to following time zones A, L, E, and P. A decoding suppression condition is provided if an instruction preserving part 117 is full and cannot receive the next instruction or decoding of the instruction is suppressed by an output line 224 of a general register collision detecting circuit 121. Times zones A, L, E, and P are alloted for address conversion processing, read processing, instruction execution processing, and write processing of execution results, respectively.