Title:
CONTROL SYSTEM FOR SHARED MEMORY
Document Type and Number:
Japanese Patent JPS62100858
Kind Code:
A
Abstract:
PURPOSE:To use a specific area of a local memory as a shared memory of a control system for shared memory by adding a means to map the address mapped in a bus area to a specific area of the local memory. CONSTITUTION:The capacity of a local memory 2 is set at 8MB in each computer system and at the same time the address of a bus area is also set at 8MB. Thus a real address is shown by 24 bits of A00-A23. Here the upper A20-A23 show an address space for each 1MB. This 1MB is defined as the processing unit in case the computer systems #0-#n use a shared memory. For instance, a mapping operation is carried out to the first memory space of 1MB of a bus area address by its own computer system or another in a computer system #0. In such a case, said bus area address functions so that the mapping operation is carried out to the final area 21 of 1MB of a local memory 2 of the computer system #0.
Inventors:
WADA OSAMU
Application Number:
JP24111885A
Publication Date:
May 11, 1987
Filing Date:
October 28, 1985
Export Citation:
Assignee:
PANAFACOM LTD
International Classes:
G06F12/00; G06F12/06; G06F15/16; G06F15/177; (IPC1-7): G06F15/16
Attorney, Agent or Firm:
Teiichi