Title:
コントローラ、およびコントローラの制御方法
Document Type and Number:
Japanese Patent JP7047728
Kind Code:
B2
Abstract:
To realize a technique that can efficiently share necessary data between multiplexed CPU modules.SOLUTION: A control system CPU module (100A) includes a first arithmetic unit (111A) that performs arithmetic processing based on a user program, and a first memory (130A) in which an arithmetic result is written. A standby system CPU module (100B) includes a second arithmetic unit (111B) that performs arithmetic processing based on a user program when an abnormality occurs in the control system CPU module (100A), and a second memory (130B). The control system CPU module (100A) further includes a first memory processing unit (121) configured to output an instruction to write the calculation result to the first memory (130A) and transfer it to the second memory (130B) of the standby system CPU module (100B).SELECTED DRAWING: Figure 1
Inventors:
Ogaki Tatsuo
Hideo Okuda
Kenji Komatsubara
Hideo Okuda
Kenji Komatsubara
Application Number:
JP2018223494A
Publication Date:
April 05, 2022
Filing Date:
November 29, 2018
Export Citation:
Assignee:
OMRON Corporation
International Classes:
G05B9/03; G05B19/05
Domestic Patent References:
| JP449402A | ||||
| JP2012168635A |
Foreign References:
| WO2013168258A1 |
Attorney, Agent or Firm:
Murakami
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