PURPOSE: To reduce power consumption and cost without damaging a processing speed by installing an ECL(emitter coupled logic) type circuit and a TTL (transistor transistor logic) type circuit.

CONSTITUTION: Respective conversion circuits 21a-21d consist of TTL type logical gates and a conversion circuit 25 consists of an ECL type logical gate. The conversion circuits 21a-21d convert parallel data PD of 16 bits into parallel data PE 0-PE 3 of four bits and a conversion circuit 23 converts parallel data PE 0-PE 3 in TTL type logical level into parallel data PE0-PE 3 of four bits in an ECL logical level. Then, the conversion circuit 25 converts parallel data PF 0-PF 3 into serial data at a high speed. Thus, power consumption and cost can be reduced without damaging the processing speed.