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Patent Searching and Data


Title:
PARALLEL/SERIAL CONVERSION SYSTEM
Document Type and Number:
Japanese Patent JPH03117220
Kind Code:
A
Abstract:

PURPOSE: To prevent production of an invalid data by providing a storage means, a parallel/serial conversion means and a control means and applying parallel/serial conversion to the remaining data while skipping an invalid data when the invalid data exists in a parallel data.

CONSTITUTION: A parallel data inputted from n-set of signal lines is stored in a storage means 10. Then a parallel/serial conversion means 20 extracts the parallel data stored in the storage means 10 sequentially by using a data extraction pulse sent from a control means 30 and converts the extracted data into a serial data. When the means 30 recognizes the absence of data in (a+1)th and succeeding lines among n-sets of signal lines based on bit information, the (a+1)th-n-th pulses in the data extraction pulse generated repetitively in the lines 1-n are skipped. Then the 1st bit of the succeeding period is restored and the parallel/serial conversion is continued. Thus, production of an invalid data is prevented.


Inventors:
SATO HIROYOSHI
Application Number:
JP25585389A
Publication Date:
May 20, 1991
Filing Date:
September 29, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03M9/00; (IPC1-7): H03M9/00
Attorney, Agent or Firm:
Sadaichi Igita