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Patent Searching and Data


Title:
A/D CONVERTER, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING IT, AND MOBILE COMMUNICATION TERMINAL
Document Type and Number:
Japanese Patent JP2000183738
Kind Code:
A
Abstract:

To provide an A/D converter whose offset error and gain error can be cancelled and to provide mobile communication terminal using it.

The A/D converter that is a general-purpose A/D converter of successive approximation type for measuring a DC level, consists of a comparison voltage generating circuit Local D/A whose lowest voltage is a ground voltage and whose highest voltage is a reference voltage resulting from amplifying internally a reference voltage VB by a multiple of (n), of a calibration circuit CAL that receives in advance the reference voltage VB and an intermediate voltage VM at an optional point of the comparison voltage generating circuit Local D/A, executes A/D conversion, and eliminates a linearity error of the comparison voltage generating circuit Local D/A, and of a conversion circuit CON that conducts A/D conversion or the like. The A/D converter conducts the calibration by means of the reference voltage VB and the intermediate voltage VM before the usual operation to calculate an error correction value VER, and subtracts this error correction value VER from a result of A/D conversion caused at each input voltage VIN.


Inventors:
SHIMA YASUO
Application Number:
JP35808198A
Publication Date:
June 30, 2000
Filing Date:
December 16, 1998
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03M1/10; H03M1/18; H04B14/04; (IPC1-7): H03M1/10; H03M1/18; H04B14/04
Attorney, Agent or Firm:
Yamato Tsutsui