To enhance conversion precision by reducing the influence of a parasitic capacity in the capacity string of a digital/analog converter.

Each capacity used for the converter has an upper polysilicone layer and a lower polysilicone layer. The upper polysilicone layer of a capacity Ch(h-1) to Ch1 corresponding to a high-order bit (H-DAC) is all connected to a common node on the side of the high-order bit and each lower polysilicone layer is connected to analog switches SWh(h-1) to SWh1. The upper polysilicone layer of a capacity Cl(l-1) to Cl1 corresponding to a low-order bit (L-DAC) is all connected to a common node on the side of the low-order bit and each lower polysilicone layer is connected to analog switches SWl(l-1) to SWl1.