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Title:
A/D CONVERTER
Document Type and Number:
Japanese Patent JPH07231255
Kind Code:
A
Abstract:

PURPOSE: To obtain a stable output of the A/D converter not affected by fluctuation of a power supply voltage by connecting one end of an output terminal of a correction circuit whose output voltage kept constant through the ruse of a Zener diode to a reference voltage input terminal of a comparator.

CONSTITUTION: One end of an output terminal 31 of a correction circuit 30 is connected to ground via a Zener diode 32 and the other end is connected to a power supply via a resistor 33 and the output voltage of the output terminal is constant by the diode 32 regardless of fluctuation of power supply voltage. The output voltage is given to a reference voltage input terminal 35 of a comparator 34. When a voltage at an input terminal 36 gets lower by fluctuation of the power supply voltage, an output of the comparator 35 goes to L by the decrease and given to control terminals 39, 40 of a contrast adjustment circuit 37 and a luminance adjustment circuit 38 connecting to an amplifier 22. A setting voltage from a contrast adjustment variable resistor (not shown) is given to an input terminal 41 of the circuit 37 and a setting voltage from a luminance adjustment variable resistor (not shown) is given to an input terminal 421 of the circuit 38, a voltage depending on an output level of the comparator 34 is given to the control terminals 41, 42 of the circuits 37, 38 to set a gain of the amplifier 22 higher.


Inventors:
ITO AKINOBU
Application Number:
JP2160794A
Publication Date:
August 29, 1995
Filing Date:
February 18, 1994
Export Citation:
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Assignee:
FUJITSU GENERAL LTD
International Classes:
H03M1/06; H03M1/34; (IPC1-7): H03M1/06; H03M1/34