PURPOSE: To prevent the output of erroneous digital data even when a switched capacitor filter type analog integrator comes into a saturation state.

CONSTITUTION: When an analog input signal is inputted between an input terminal 2 and the ground in a state where an analog switch SW3 is closed, analog switches SW4 and SW5 are connected on the side of 1 and N analog switch SW1 is closed, a capacitor 1 is charged with a charge corresponding to the analog input signal and a capacitor 2 is charged with a charge corresponding to +V. Then, the charges charged to the capacitors C1 and C2 are transferred to capacitors C3 and C4. When the charge is accumulated in the capacitors C3 and C4 by repeating the operation and exceeds a time set by a comparator 9, a controller 10 connects the analog switches SW4 and SW5 on the side of the ground and the charge held in the capacitor C4 is discharged so that proper A/D conversion can be operated even just after saturation.