To linearly frequency/voltage-convert frequency of an input signal in wider wide range by phase-comparing the output signal of a divider and the output signal of a delay circuit, extracting DC components from the output signal outputted from a phase comparator and transmitting this to a signal output terminal.
A 1/2 divider 2 is connected to the signal input terminal of the post-stage, and the output signal of the divider 2 is inputted to a delay circuit 3 and an EX-OR phase comparator 4. As a result, a frequency signal inputted to the input terminal 1 is converted into a half-frequency signal (two fold in period) by a dividing circuit, and this frequency signal and the delayed signal of this frequency signal are phase-compared. That is, the delay circuit 3 delays the output signal of the divider 2 which divides the input signal to be inputted to the signal input terminal, the output signal of the divider 2 and the output signal of the delay circuit 3 are phase-compared in the phase comparator 4, and a low-pass filter 5 extracts the DC components out of the output signal outputted from the phase comparator 4 and transmits this to the signal output terminal.
HIROSE MASAKI
ISHIHARA NOBORU
AKAZAWA YUKIO
SAKURAI HISAYA
KIKUSHIMA KOJI
KISHIMOTO TOMOMASA
IKEDA SATOSHI
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