PURPOSE: To simplify further the circuit constitution of a serial/parallel converting circuit converting a serial data sent continuously in terms of the hardware by providing a register inputting only a part of a bit data and saving it.
CONSTITUTION: A serial data sent one by one bit in the order of a bit data Do of the least significant digit to the high-order digit bit data D1, D2,...D15 is inputted to a serial data input Din. Then a word data Wo is inputted sequentially from the head bit to a shift register 12. On the other hand, the input of the head bit data Do is finished and the succeeding bit data D1∼ is started to be inputted, the content Do of a 1-bit register 12c is transferred to a buffer register 12d synchronously with the timing signal cp3 at the 2nd bit and stored. Thus, the serial data Din transmitted continuously is converted sequentially into the parallel data Dout and outputted by repeating the operation that the data Do and D1∼D15 stored respectively in the two registers 12d, 12 are extracted and latched when the head bit data Do is inputted and read in this way.
ISO YOSHIMI
NODA TSUTOMU
