To provide a low-cost counter circuit which can detect the fault of counting action, including parasitic oscillations.

When the number of times of input of pulse signals P1 which are the target of counting comes to a specified value, this counter circuit controls a switching circuit 20 with the first control circuit 40 by a counting completion signal from a pulse-counting circuit 10, and inputs an AC signal So1 as an inspection signal So into a pulse-counting circuit 10, and determines the normality/abnormality of the frequency of the then dividing output Sc1 from the pulse-counting circuit 10 with the first frequency determining circuit 51. If it is normal, the inspection signal So2 is switched to an AC signal So2 by a second control circuit 53 and determines the normality/abnormality of the frequency of the dividing output Sc1 at that time from the pulse counting circuit 10 with the second frequency determining circuit 52. If it is normal, this generates a determination output Z=1, which indicates the normality of counting action from the determining circuit 50.