To provide a counter device which can read or write a timer counter stably with a timer clock asynchronous with a system clock, a clock controller which stably supplies the timer clock, and a interval timer device which is equipped with those devices and actualized by easy designing.
The interval timer device is equipped with the timer counter 11 which inputs and counts the TLCK (timer clock) asynchronous with the CLK (system clock) or writes external input data from an asynchronous preset terminal, a means 12 which decides the timing of counter value update, a readout temporary register 13 which inputs and holds the counter value again when the timing is constant, a means 14 which controls whether or not the TCLK is allowed to pass, a write temporary register 16 which temporarily stores the external input data when the timer clock passes, and a means 15 which generates a control signal showing the timing of the writing of the temporarily stored data to the timer counter 11.
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