Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
COUNTER
Document Type and Number:
Japanese Patent JPS63117518
Kind Code:
A
Abstract:

PURPOSE: To easily count the frequency in use of an instruction code signal, by sharing a required counting function by a hardware counter small in capacity, and a mass storage software counter, and making a buffer type storage perform matching between them.

CONSTITUTION: When access to a storage circuit 2-6 becomes effective on a computer 2-1 side, the instruction code signal 2-21 in an address holding circuit 2-4 reads out a content corresponding to the circuit 2-6. One is added on a read out data at an adder circuit 2-7, and the content of the circuit 2-6 is updated. Also, when a carry signal from a circuit 2-7 becomes effective, the output of the circuit 2-4 is stored in a buffer type storage circuit 2-10. When an effective data exists in the circuit 2-10, a data processor 2-14 reads out the content of the circuit 2-10. The processor 2-14 is provided with a software counter in the inside, and adds one on the content of the circuit 2-10. Next, the processor 2-14 reads out the contents of all of the addresses of the circuit 2-6, and when the content of the circuit 2-10 is effective, it updates the contents. In such way, the frequency of an instruction under execution can be easily counted.


Inventors:
MARUYAMA MASATO
Application Number:
JP26263986A
Publication Date:
May 21, 1988
Filing Date:
November 06, 1986
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03K21/00; H03K23/00; H03K23/58; (IPC1-7): H03K23/00; H03K23/58
Attorney, Agent or Firm:
Namiki Akio