PURPOSE: To scale down a device and to reduce its cost by providing a trapezoidal wave generator circuit, a DC power source circuit and two AND circuits so as to constitute a resetting control circuit.
CONSTITUTION: The trapezoidal wave generator circuit 4 generates a trapezoidal wave if an AC signal dropping a commercial power source exceeds a prescribed voltage. The DC power source circuit 5 generates a DC voltage signal if a power source voltage is impressed to a CPU1. A resistance R1 and a capacitor C2 delay the output signal of the circuit 5. When the output signal CH1 of the delay circuit is at a level H and the output trapezoidal wave ANin of the circuit 4 is at a level H, the output of a NAND gate NAND1 comes to a level L. Accordingly, the output of a NAND gate NAND2 becomes a level H, and the reset CPU1 is released. When the CPU1 starts executing, an output CPUOUT is made at a level H. Then the output of an inverter I comes to a level L, which leads the output of the NAND2 at a level H. Consequently, the resetting release state is maintained.
FUJITA HIROSHI
JPS58204724A | 1983-11-29 | |||
JPS59146349A | 1984-08-22 | |||
JPS5876931U | 1983-05-24 |