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Title:
Cu WIRING FORMATION METHOD
Document Type and Number:
Japanese Patent JP2014036109
Kind Code:
A
Abstract:

To provide a Cu wiring formation method capable of obtaining a Cu wiring with high electromigration resistance without causing a void or the like and without a complicated step and an increase in leak current between wirings.

A Cu wiring formation method comprises the steps of: forming a barrier film 204 on the entire surface of a wafer W including a trench 203; forming an Ru film 205 on the barrier film 204; embedding a Cu film 206 into the trench 203 by forming the Cu film 206 on the Ru film 205 by PVD; forming a stacked layer 207 on the Cu film 206; forming a Cu wiring on the trench 203 by polishing the entire surface of the wafer by CMP; forming a metal cap 209 composed of a manganese oxide film on the entire surface of the wafer W; and forming a dielectric cap 213 on the metal cap 209.


Inventors:
ISHIZAKA TADAHIRO
GOMI ATSUSHI
SUZUKI KENJI
HATANO TATSUO
TOSHIMA HIROSHI
MIZUSAWA YASUSHI
Application Number:
JP2012176422A
Publication Date:
February 24, 2014
Filing Date:
August 08, 2012
Export Citation:
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Assignee:
TOKYO ELECTRON LTD
International Classes:
H01L21/3205; C23C14/14; H01L21/28; H01L21/285; H01L21/768; H01L23/532
Domestic Patent References:
JP2006148075A2006-06-08
JP2011023456A2011-02-03
JP2011249794A2011-12-08
JP2009105289A2009-05-14
JP2008147467A2008-06-26
JP2012009788A2012-01-12
JP2007103546A2007-04-19
JP2010021447A2010-01-28
JP2012074522A2012-04-12
Attorney, Agent or Firm:
Hiroshi Takayama