PURPOSE: To improve the use efficiency of data and to relieve restrictions on data constitution by equipping a selector circuit which outputs serial data selectively as a serial conversion signal.

CONSTITUTION: When data is transferred to a buffer 1 normally, serial data 2a from a shift register 2 is outputted as the serial conversion output signal 8a from the selector circuit 8. When, however, a buffer-full control circuit 4 outputs a data transfer incompletion signal 4a, the control proceeds to the following incorrect word output operation and an incorrect output 7a is outputted selectively as a serial conversion output signal 8a. At this time, an incorrect word generating circuit 7 operates synchronizing with the shift register 2. Consequently, it is unnecessary to impose restrictions on data constitution in normal P/S conversion and the use efficiency of data is improved.