Title:
DATA MEMORY
Document Type and Number:
Japanese Patent JPS5652461
Kind Code:
A
Abstract:
PURPOSE:To make it possible to efficiently process a conditional branch instruction, by supplying a branch instruction from the charge transfer element block which has been selected by BOD, in case the conditional branch instruction is executed and is made to branch. CONSTITUTION:Now, in case the instruction sent from the sub CPU is a conditional branch instruction, it is output from the output latch circuit 22, and at the same time a data is stored in plural charge transfer elements CTD10-13. After that, when this conditional instruction is sent to the main CPU and the condition is decided, the information for selecting one of the CTDs 10-13 is given to the BOD terminals 1-4. At this time, in case the conditional branch instruction is executed and is made to branch, an instruction in case the conditional branch instruction has not been executed is latched in the output latch circuit 22, and therefore this instruction is removed at first, and a branch instruction is provided to the output latch circuit 22 from the CTD block selected by BOD.
Inventors:
HIRASHIMA KUNIHIKO
Application Number:
JP12858279A
Publication Date:
May 11, 1981
Filing Date:
October 05, 1979
Export Citation:
Assignee:
PIONEER ELECTRONIC CORP
International Classes:
G06F15/16; (IPC1-7): G06F15/16