To provide a data processing apparatus capable of accelerating processing.

The data processing apparatus includes: a computing unit; a register for storing data processed by the computing unit; a register cache capable of accessing a register faster than a cache memory which is the saving destination of the data stored in the register; a memory bus arbiter for storing the data stored in the register cache in the cache memory when the computing unit does not access the cache memory; and a control part for controlling the input/output of the data to/from the register. The register cache has a function for storing data output from the register in accordance with the write request of the data stored in the register and a function for selecting data requested to be restored out of the data stored in the register cache and restoring the selected data to the register in accordance with the data restoration request to the register.