PURPOSE: To improve the data processing efficiency by acquiring and storing statistic data relating to error at each track and reading the data of the track after correction from the beginning when the error generating probability at each track reaches a prescribed value or over so as to decrease the time required for the correction of error.

CONSTITUTION: If a parity error occurs in a data inputted to a data reading section 1, a VRC (Vertical Redundancy Check) signal "1" is inputted to a data correcting gate 10 from a parity check circuit 6. On the other hand. A microprocessor 3 counts a track whose error is detected by an error track detecting circuit 2 at each track from an RAM 12 based on the content of an error track pointer 5, and when a specific counter exceeds a prescribed numeral value, a CRF (correction fix) signal is set at the succeeding data reading so as to bring a bit in a correction pointer 8 corresponding to a track where the error is concentrated to logical "1". Thus, a data read in the 1st data register 4 afterward is correctd by a data correction gate 9 without fail and transferred to the 2nd data register 11.