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Title:
DATA RECEIVER
Document Type and Number:
Japanese Patent JPS5487445
Kind Code:
A
Abstract:

PURPOSE: To simplify data conversion when frame and word constitutions change by providing an interruption signal generating circuit which generates an interruption pulse with a fixed delay time from the output, obtained by waveform-shaping series data, and by converting the series data into parallel data by this signal.

CONSTITUTION: The data receiver which converts series data received from a transmitter into parallel data and outputs the converted data is provided with waveform shaping circuit 22 which waveform-shapes the received data and interruption signal generating circuit 25 which receives the output of this circuit 22 and then output an interruption pulse signal with a fixed delay time from the rise of the inputted waveform. Further, data processor 26 is provided which fetches the output of circuit 22 by this interruption signal and converts the fetched series data into parallel data; and the output of this processor 26 is stored in memory circuit 27 composed of FF1 to FFn, and relays RY1 to RYn which correspond to FF1 to FFn are driven to output information.


Inventors:
NAKAMURA MITSURU
YOSHIZAKI ATSUHIRO
Application Number:
JP15592977A
Publication Date:
July 11, 1979
Filing Date:
December 23, 1977
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03M9/00; G06F17/40; H04L25/40; H04L25/49; (IPC1-7): G06F3/04; G06F5/04



 
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