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Patent Searching and Data


Title:
DATA SIGNAL CONVERSION SYSTEM
Document Type and Number:
Japanese Patent JPS6326136
Kind Code:
A
Abstract:

PURPOSE: To obtain an economical data signal conversion system by extracting a terminal data, converting the speed into a terminal data speed and detecting a synchronizing pattern at a high speed data signal sent from an exchange while using a data signal frame pattern stored in a pattern memory of a data exchange circuit.

CONSTITUTION: A pattern corresponding to a terminal data and a synchronizing pattern or the like is stored in an address corresponding to 80-bit of a data signal frame in a pattern memory 226. When a counter 227 receiving a clock generated from a control signal generating circuit 228 generates an address synchronously with the transmission of the data signal frame, a control signal S3 is sent from an address relating to the terminal data of the data signal frame in the pattern memory 226 and a control signal S4 is sent from an address relating to the synchronizing pattern. A terminal data extracting circuit 223 receives the control signal S3 to extract the terminal data from the data signal frame and a synchronizing pattern detection circuit 224 receives the control signal S4 to detect the synchronizing pattern.


Inventors:
MISE KIYOBUMI
TAKANO RYOJI
Application Number:
JP17034986A
Publication Date:
February 03, 1988
Filing Date:
July 18, 1986
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L7/00; H04L7/08; H04L13/00; H04L29/06; (IPC1-7): H04L7/00; H04L7/08; H04L13/00
Attorney, Agent or Firm:
Sadaichi Igita