PURPOSE: To attain high speed processing of data transfer speed and to avoid the simultaneous access by writing a data to an initial buffer in a command in the transfer direction and transferring sequentially the data of a pre-stage buffer to a succeeding buffer in response to the indication of the data transfer direction, data written display and data read display.

CONSTITUTION: The data transfer from a buffer 61 to a buffer 62 after a data is written in a first buffer 61 is as shown in the following in a data transfer command direction commanded by a 2nd digital data transmitter-receiver 4. That is, the data is transferred sequentially from the pre-stage buffer 61 to a buffer 6i+1 next to the pre-stage buffer 61 in response to the command of the data transfer direction, the data written display represented by a 1st display means 8 and a data readout display commanded by a 2nd display means 10. Thus, the data transmission from the buffer 61 to the buffer 6i+1 is sequentially implemented automatically without firmware control of the 2nd digital data transmitter-receiver 4. Thus, as soon as high speed data transfer is implemented, the simultaneous access to the buffer is avoided.