To provide a data transfer controller capable of realizing DMA operation of good execution efficiency mainly for the completion of DMA within a limited time by controlling a plurality of DMA requests timewise.
A DMA controller 1A consists of a starting factor reception part 2, a starting order mediation part 3, a DMA execution part 4, a bus control part 5, a transferring time calculation part 6 and a timing monitoring part 7. When a DMA starting request occurs, the part 3 requests starting to the part 2 and in correspondence with the starting factors (a transferring size, a transferring mode and a transfer limit time), the part 3 mediates a DMA starting order to start DMA in order. By incorporating a timewise element into DMA processing whose execution time is irregular, the processing can be controlled as time which can be calculated in the whole system controlled timewise. In particular, this controller is effective for constructing a synchronizing system requiring control at a fixed time intervals and a communication control system having real time property.
SHIGETA HIROMI
OKAWA TSUTOMU
