PURPOSE: To obtain a variable length code decoder simplified at its circuit constitution and control by directly decoding serial data as it is.

CONSTITUTION: A bit-serial variable length code to be decoded is inputted to a flip flop(FF) 1 synchronously with a clock CKI and latched. A memory 3 is a ROM storing information and the contents of the memory 3 are outputted by using the contents of the FFs 1, 2 as addresses. The variable length code has tree structure and each leaf part has a code word shown by a double circle. A black dot expresses an initial state, a void circle expresses a halfway state, the halfway state is transitted in the right or left direction in accordance with data '0' or '1' bit-serially inputted from the initial state, and at the time of reaching a double circle state, a decoded value is outputted. In an example shown by a broken line, data '001' are inputted, transitted through a route of S0, S3, S5, and S6 and reached to a double circle and '2' e.g. corresponding to the '001' is outputted as a decoded value.