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Title:
復号装置およびデータ再生装置、並びに復号方法
Document Type and Number:
Japanese Patent JP4193262
Kind Code:
B2
Abstract:
A decoding apparatus and data reproduction apparatus which can perform correction of 1T and 2T which inherently cannot exist as EFM signals, reduce processing of an error correction circuit, and improve the playability. Provision is made of an EFM block containing a correction portion for detecting an edge of an RF signal converted to a binary format by the PLL asymmetry correction circuit for NRZ conversion, using a clock generated in the digital PLL circuit for synchronization, detecting 1T and 2T (T is a channel clock period), which inherently cannot exist as EFM signals in format, generated at the time of synchronization, correcting the detected 1T and 2T signals to 0 or 3T in accordance with predetermined conditions to remove the 1T and 2T from the RF signal, and modulating the RF signal from which the 1T and 2T have been removed by EFM and a demodulation circuit for demodulating by EFM a signal after modulation by EFM.

Inventors:
Noma Masami
Minoru Hashimoto
Hiromasa Kimura
Application Number:
JP1114299A
Publication Date:
December 10, 2008
Filing Date:
January 19, 1999
Export Citation:
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Assignee:
ソニー株式会社
International Classes:
H03M7/14; G11B20/14; H03M5/14
Domestic Patent References:
JP10222939A
JP10334613A
JP10334601A
Attorney, Agent or Firm:
Takahisa Sato