PURPOSE: To reduce various logic circuits by providing a semiconductor memory with a decoding function and combinational circuit function by reading combinational logic data by supplying normal input data and various condition signals to the address input of the semiconductor memory.

CONSTITUTION: ROM21 is equipped with terminals A0WA9 to which 10-bit address data are inputted and 4-bit data output terminals D0WD3; and data DATA to be decoded are supplied from the central processor to terminals A2WA9, and condition signals, e.g. selective timing signals SELA and SELB, are supplied to terminals A0 and A1. In respective addresses of ROM21, on the other hand, 4-bit combinational logic data D0WD3 are fixedly stored corresponding to respective inputs. Then, when each input is supplied at fixed timing, data D0WD3 are outputted.