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Title:
DELTA DEMODULATION CIRCUIT
Document Type and Number:
Japanese Patent JPH01101706
Kind Code:
A
Abstract:

PURPOSE: To obtain the delta demodulation circuit of high stability and accuracy by giving the change of an input voltage to first and second capacitors as an electric charge and detecting the change of this charge quantity with coupling capacity.

CONSTITUTION: A switch circuit is composed of transmission gates(TG), TG2, TG4, TG5 and TG7, which is composed of an NMOS transistor, and a capacitors 3 and 6 which charge and discharge an analog input voltage. Then, the title circuit has an impedance converting circuit 8, which sends the output voltage of the switch circuit as the output of a low output impedance circuit, a coupling capacitor 9 and inverter circuits 10 and 12. An analog input is alternatively charged and discharged by the capacitors 3 and 6 and the change of the fine input voltage is detected according to the size of the electric charge to be accumulated to the total capacity. Thus, the delta modulation circuit, which is stable and highly accurate, can be obtained.


Inventors:
KONO HIROYUKI
KUMAMOTO TOSHIO
Application Number:
JP25995287A
Publication Date:
April 19, 1989
Filing Date:
October 14, 1987
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03M3/00; H03C3/00; (IPC1-7): H03C3/00; H03M3/00
Attorney, Agent or Firm:
Masuo Oiwa (2 outside)



 
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