Title:
DEMODULATING DEVICE, CLOCK REPRODUCING DEVICE, DEMODULATING METHOD AND CLOCK REPRODUCING METHOD
Document Type and Number:
Japanese Patent JP3504119
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To realize demodulation with a low bit error rate even at the time of noise or interference in the demodulation of reception data group which is encoded so as to express one symbol by plural bits in a time axis.
SOLUTION: A system is composed of a clock reproducing circuit 2 generating a reproducing clock and outputting it, a state estimating circuit 3 estimating a reception state a waveform distortion, or the like, from a reception data group and outputting waveform information based on the estimation result and a correlator 4 correcting reference and/or sampling points based on the reproducing clock and waveform information, obtaining a correlative value between the reception data group and reference from the plural sampling points and outputting demodulating data based on the correlative value.
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Inventors:
Yasushi Sokabe
Fumio Ishizu
Keiji Murakami
Fumio Ishizu
Keiji Murakami
Application Number:
JP24834997A
Publication Date:
March 08, 2004
Filing Date:
September 12, 1997
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H03M5/12; H04L7/027; H04L25/49; (IPC1-7): H04L25/49; H03M5/12; H04L7/027
Domestic Patent References:
| JP63313945A | ||||
| JP5869151A | ||||
| JP6326611A | ||||
| JP589448A | ||||
| JP8223148A |
Attorney, Agent or Firm:
Hiroaki Sakai (2 others)