Title:
磁気記録再生装置の復調回路
Document Type and Number:
Japanese Patent JP3591902
Kind Code:
B2
Abstract:
A decoding circuit for a magnetic recording and reading system enables the implementation of an AGC loop with a relatively simple configuration and further enables easy clock extraction and high operating speed. The level setting system for setting the signal level to be taken as the value 1 in the decoding circuit is configured so as to comprise a variable-gain amplifier, a PR4 equalizer having characteristics capable of equalizing to a target PR4 equalization waveform, and a level detector which feeds the output signal back to the variable-gain amplifier as an AGC loop control signal to control the gain thereof. The detection system of the decoding circuit is configured so as to comprise a VFO which generates a system clock fs, and a decision feedback type decoding means in a decision section, which decodes data lines which appear at the output of the PR4 equalizer. In doing this, by configuring the decision feedback type decoding means so as to comprise a decoding means for even data lines and a decoding means for odd data lines, it is possible to reduce the system clock frequency to one half, thereby enabling an increase in the speed of decoding.
Inventors:
Hiroshi Muto
Application Number:
JP1921795A
Publication Date:
November 24, 2004
Filing Date:
February 07, 1995
Export Citation:
Assignee:
富士通株式会社
International Classes:
G11B20/10; G11B20/18; H03H21/00; G11B20/14; H03M13/39; H04B3/04; (IPC1-7): G11B20/14; G11B20/18; H03M13/39
Domestic Patent References:
| JP6295535A | ||||
| JP6111478A | ||||
| JP6243580A | ||||
| JP6259890A | ||||
| JP6243413A | ||||
| JP5234254A |
Attorney, Agent or Firm:
Takashi Ishida
Shigeru Tsuchiya
Toshio Toda
Masaya Nishiyama
Shigeru Tsuchiya
Toshio Toda
Masaya Nishiyama