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Title:
DEMODULATION CIRCUIT OF PULSE WIDTH MODULATED SIGNAL INTO DIGITAL SIGNAL
Document Type and Number:
Japanese Patent JP2769777
Kind Code:
B2
Abstract:

PURPOSE: To demodulate only a pulse width modulated signal whose modulation is 1/3-2/3 into a binary digital signal.
CONSTITUTION: A pulse signal whose frequency is a multiple of 2N×3 of a transmission frequency of a pulse width modulation signal is oscillated from an oscillator 18 and given to a binary counter 20 in (N+2) digits only for a period when the pulse width modulation signal is given. An edge detection circuit 14 detects a rise of the pulse width modulation signal to clear the count. An output up to the N-th digit of the counter 20 is given to a latch circuit 22 and its latch output is outputted to an output terminal 24. An output in (N+1) digits is given to a NAND circuit 26, an output in (N+2) digits is given to the NAND circuit 26 via an inverter 28 and its output is given to a NOR circuit 16. The pulse width modulated signal is given to the NOR circuit 16 and when the count at the trail of the pulse width modulation signal corresponds to any modulation within a range of 1/3-2/3, a latch circuit 22 is latched by an output from the NOR circuit 16.


Inventors:
Megumi Negishi
Yu Okano
Application Number:
JP35261993A
Publication Date:
June 25, 1998
Filing Date:
December 28, 1993
Export Citation:
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Assignee:
Denkisha Machinery Works Co., Ltd.
International Classes:
H03M1/82; G01R29/02; H03K9/08; H03M1/50; H04L25/49; (IPC1-7): H03M1/50; G01R29/02; H03K9/08; H04L25/49
Domestic Patent References:
JP5122081A
JP61283223A
JP1277768A
JP6080786A
JP3114067U
JP62121574U
Attorney, Agent or Firm:
Tetsuo Moriyama