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Title:
DEMODULATION CIRCUIT
Document Type and Number:
Japanese Patent JPS60194809
Kind Code:
A
Abstract:

PURPOSE: To prevent beat disturbance from being caused even under the condition where the frequency band of an inputted modulation signal and a demodulated output is overlapped by interrupting an input signal of the modulation signal and an output terminal of the demodulated output by means of a digital operating circuit.

CONSTITUTION: An FM signal is inputted to an input terminal 21, an A/D converter 22 samples the inputted FM signal by using a sampling clock supplied from a clock generating circuit 23 so as to output a digital signal of a proper bit number. A digital signal corresponding to the demodulation output as to the input modulation signal is generated from the digital operating circuit 24, it is converted into an analog signal by a D/A converter 25 and extracted as a demodulation signal via an output terminal 26.


Inventors:
YAMADA HISASHI
Application Number:
JP5061684A
Publication Date:
October 03, 1985
Filing Date:
March 16, 1984
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
H03D3/00; (IPC1-7): H03D3/00
Domestic Patent References:
JPS56140706A1981-11-04
Attorney, Agent or Firm:
Takehiko Suzue



 
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