Title:
【発明の名称】電圧制御発振回路
Document Type and Number:
Japanese Patent JP3087683
Kind Code:
B2
Abstract:
A voltage controlled oscillator is implemented by odd inverters forming a loop, and a depletion type load transistor, a depletion type frequency control transistor and a depletion type compensating transistor supply driving current to an enhancement type driving transistor in each inverter; the compensating transistor is controlled by a reference voltage generator implemented by a series of resistor and a depletion type load transistor, and fluctuation in a fabrication process equally affects the depletion type transistors; when the depletion transistors increases the driving current, the resistor decreases the reference voltage supplied to the gate electrode of the depletion type compensating transistor, and the depletion type compensating transistor cancels the increment of the driving current so as to make the voltage controlled oscillator less sensitive to the fluctuation of the threshold.
Inventors:
Makoto Kaneko
Application Number:
JP13041497A
Publication Date:
September 11, 2000
Filing Date:
May 02, 1997
Export Citation:
Assignee:
NEC
International Classes:
H03K3/354; H03K3/011; H03K3/03; H03K19/0944; H03L1/00; (IPC1-7): H03K3/354
Attorney, Agent or Firm:
Asamichi Kato