Title:
【発明の名称】電圧制御発振回路
Document Type and Number:
Japanese Patent JP3102396
Kind Code:
B2
Abstract:
A voltage controlled oscillation circuit for use in a Phase Locked Loop circuit has a plurality of voltage controlled current generating circuits(60A,60B,60C), a current adder(62), and a current controlled oscillation circuit (70). Each of the voltage controlled current generating circuits has a control voltage-output current characteristic different from each other so as to stabilize a control voltage-oscillation frequency gain of the voltage controlled oscillation circuit against manufacturing variation of a voltage-current characteristic or a threshold voltage of transistors comprising said voltage controlled oscillation circuit.
Inventors:
Manabu Kawaguchi
Application Number:
JP33317197A
Publication Date:
October 23, 2000
Filing Date:
December 03, 1997
Export Citation:
Assignee:
NEC
International Classes:
H03B1/00; H03L1/00; H03L7/099; (IPC1-7): H03L7/099; H03B1/00
Domestic Patent References:
| JP98567A | ||||
| JP9223960A | ||||
| JP1157612A | ||||
| JP9312565A | ||||
| JP8125528A | ||||
| JP8139597A |
Attorney, Agent or Firm:
Takao Maruyama