Title:
【発明の名称】離散符号化信号を受信するために動作する受信機用の誤り検出回路
Document Type and Number:
Japanese Patent JP3382250
Kind Code:
B2
Abstract:
An error detector circuit, and an associated method, for a discrete receiver. The error detector circuit indicates bad frames of binary information signals which contain distorted bits of data in numbers so great as to prevent a convolutional decoder from generating, accurately, a decoded signal. When bit errors are detected in numbers beyond a first preselected value of the signal quality of a received signal combined with the detected number of bit errors forms a signal beyond a second preselected value, a bad frame is indicated.
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Inventors:
Soame, Joseph Francis
Arora, Arbind Shinhi
Vingard, Niels
Arora, Arbind Shinhi
Vingard, Niels
Application Number:
JP51702194A
Publication Date:
March 04, 2003
Filing Date:
December 23, 1993
Export Citation:
Assignee:
MOTOROLA INCORPORATED
International Classes:
G06F11/10; H03M13/00; H04L1/00; H04L1/20; (IPC1-7): H04L1/00; G06F11/10
Domestic Patent References:
| JP60153650A | ||||
| JP5503825A |
Attorney, Agent or Firm:
Yoshiaki Ikeuchi (1 person outside)