PURPOSE: To delay the 1st input signal is response to the delay of the 2nd input signal of a multiplier and to obtain a detection output which is free from distorsions, by constituting an FM detector with a phase shifting capacitor, a tuning circuit and a multiplier and providing an integration circuit at the 1st signal input terminal of the multiplier.

CONSTITUTION: A quadrature detecting circuit 6 is provided with a phase shifting capacitor C11, a coil L11 forming a tuning circuit, a capacitor C12 and a multiplier consisting of transistors TRQ1∼Q6. This circuit 6 is set at the output side of an IF circuit 5 of an FM receiver, a TV receiver, etc. The 1st and 2nd integration circuits consisting of resistances R11 and R12 and base-emitter capacitors CBE1 and CBE2 of TRQ1 and TRQ2 are provided at the 1st signal input terminal of the circuit 6. These integrated circuits set a +90° phase shift between the voltage applied to the bases of TRQ1 and TRQ2 and the voltage to be applied to the bases of TRQ3 and TRQ4 from a tuning circuit. Then the correspondence is secured between the 1st and 2nd input signals of the multiplier. Thus it is possible to obtain a detection output free from distortions.