Title:
DEVICE FOR PLANARIZING SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JP3498902
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent a grindstone from chipping, improve dressing accuracy of the grindstone and prevent a side slip of the grindstone due to sliding friction between a semiconductor wafer and grindstone segments when a wafer surface is planarized with a segmented grindstone.
SOLUTION: A grindstone 20 for planarizing the surface of a processed wafer 1 is one used in a fixed abrasive grain grinding method and divided into a plurality of segments. These segments are bonded on a similarly segmented grindstone base 51 and then replaceably mounted on a surface plate 12 via the grindstone base 51. A gap between the grindstone segments is set to be 0.2-2 mm. The grindstone segments 20 are surface attracted to the surface plate 12. Keys for accepting sliding friction caused by wafer planarization via the grindstone base are disposed on the surface plate.
Inventors:
Kenji Inayoshi
Shigeo Moriyama
Takayasu Furukawa
Masahiro Takaruki
Kenji Naya
Shigeo Moriyama
Takayasu Furukawa
Masahiro Takaruki
Kenji Naya
Application Number:
JP22628099A
Publication Date:
February 23, 2004
Filing Date:
August 10, 1999
Export Citation:
Assignee:
株式会社日立製作所
日本特殊研砥株式会社
日本特殊研砥株式会社
International Classes:
B24B1/00; H01L21/304; (IPC1-7): H01L21/304; B24B1/00
Domestic Patent References:
| JP639733A | ||||
| JP6226608A | ||||
| JP11188642A | ||||
| JP10335276A | ||||
| JP11151675A |
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)
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