PURPOSE: To obtain a diagnostic system of a logic circuit including a sequential circuit which does not invite the increase of hardware and delay of signals to the diagnosing circuit by providing a receiving part to which an indirect scanning procedure is input and a processing part for outputting test data for diagnosis and an expected value for every failure mode.
CONSTITUTION: To a receiving part are input the connecting relationship of elements constituting a diagnosing logic circuit, a scanning procedure for observing values at external output terminals of first logic circuits 130, 131, and an indirect scanning-out procedure whereby an output value of the diagnosing circuit is held at a circuit 100 when values are set to the circuits 130, 131 or external input terminals, and the output value is observed by the external output terminals or circuits 130, 131. A processing part outputs test data for diagnosis to be input to the circuits 130, 131, and an expected value for every failure mode in accordance with the connecting relationship, scanning-out procedure and indirect scanning-out procedure. Accordingly, the output value from the diagnosing circuit is sent through a sequential circuit thereby to form data to be indirectly scanned out.
MORIWAKI IKU
NAGAI MASAHIKO
NAGUMO TAKAHARU
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