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Title:
DICING BLADE FOR SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JPS60197372
Kind Code:
A
Abstract:

PURPOSE: To reduce the formation of chipping by making the thickness of the peripheral edge part of a wafer thinner than that of the holding part and increasing the grinding amount on the uppersurface of the wafer with the increase of the depth of cutting-in, thus reducing the resistance in cutting operation.

CONSTITUTION: The peripheral edge part 11a of a blade 11 is formed thinner than the thickness of a nipping part which does not cut a wafer 4 and is held by a holder 2, and the thickness of the blade 11 is varied into straight-line form from the peripheral edge part 11a towards the holding part 11b in symmetrical form with respect to the center of thickness of the blade 11, as shown on the side 11c, and the shape of the section of the blade 11 is formed into isosceles trapezoid. When the wafer 4 is cut by using the blade 11 thus formed, the taper coinciding with the shape of the blade 11 is formed on the wafer edge surfaces on the both sides of the cut part 12, and the amount of cutting-in gradually increases as the depth of cutting-in increases, and the formation of chipping on the uppersurface of the wafer 4 can be reduced.


Inventors:
SASAKI SHIGEO
Application Number:
JP5023384A
Publication Date:
October 05, 1985
Filing Date:
March 16, 1984
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
H01L21/301; B24D5/12; H01L21/78; (IPC1-7): B24D5/12; H01L21/78
Attorney, Agent or Firm:
Kiyoshi Inomata



 
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