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Title:
DIFFERENTIAL AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JPH05199100
Kind Code:
A
Abstract:

PURPOSE: To suppress a through-current by adding one stage or plural stages of inverters to the circuit, setting a high potential of an output signal close to a power supply potential and a low potential close to a ground potential and making the output signal stable so as to facilitate the setting of a threshold voltage.

CONSTITUTION: A 4th stage of circuit is added to the differential amplifier circuit comprising 1-3 stages of each inverter in which TRs 1, 2, and 3, 4, and 5, 6 and 7, 8 are connected in series. That is, A gate and a drain of the TR 1 are connected in the 1st stage, an inverse of the input signal (-a) is fed to the gate of the TR 2 in the 1st stage, an output signal (b) of the 1st stage is fed to the gate of the TR 3 in the 2nd stage, an input signal (a) is fed to the gate of the TR 4. Moreover, output signals c, d of the 2nd and 3rd stages are fed to the gates of the TRs 5, 7 and the signals -a, a are fed to the gates of the TRs 6, 8 in the 3rd and 4th stages and a high potential and a low potential of the output signal (e) are set closer to a power supply potential and a ground potential to make the potential stable. Thus, the setting of the threshold voltage of the next stage is facilitated to suppress a through-current to the next-stage.


Inventors:
ICHIMURA TORU
Application Number:
JP1015892A
Publication Date:
August 06, 1993
Filing Date:
January 23, 1992
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03F3/45; H03K19/0185; (IPC1-7): H03F3/45; H03K19/0185
Attorney, Agent or Firm:
Soga Doteru (6 people outside)



 
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