PURPOSE: To allow the demodulator to have a high processing speed, high accuracy and bipolar performance by designing the circuit of the demodulator so that a sum of a voltage nearly equal to a mean DC voltage of an output waveform of a critical PWM generator for one period and an output of a sample-and-hold amplifier is equal to an output mean value of the critical PWM generator.

CONSTITUTION: An output waveform of an integrator of the demodulator has a zero at a 1/2 synchronizing point and is point-symmetric with respect to this point. Then an area of the first half of the waveform with respect to a time base is equal to that of the latter half, but the sign of them is opposite to each other. Thus, the total sum of the areas of the waveform of the integrator on the time base is zero. Furthermore, as analog information Ex of a critical PWM waveform approaches a full scale, the area of the half period is close to zero. Thus, an error factor due to the dielectric absorption characteristic of a feedback capacitor C of the integrator is excluded and a similar error factor of a sample-and-hold amplifier is avoided. Thus, the critical PWM demodulator has a highly accurate linearity in which a problem of a response delay due to the dielectric absorption characteristic or the like is solved.