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Patent Searching and Data


Title:
DIGITAL-ANALOG CONVERTING CIRCUIT
Document Type and Number:
Japanese Patent JPS6139726
Kind Code:
A
Abstract:

PURPOSE: To obtain the same amplitude as that of a high voltage power supply with the use of a low voltage power supply and to eliminate invasion of noise from a power supply by constituting the titled circuit with two sets of capacitor arrays, a means increasing or decreasing a voltage of the other terminal of the arrays, a balanced operational amplifier and two sets of switches.

CONSTITUTION: S3, S4 are closed at a period when reset is executed and a switch of the capacitor array A is thrown to the position of a reference voltage when the reference voltage VRef is higher than a ground voltage VGND. The switch of the array B is thrown to the position of ground. S1, S2 are connected respectively to the array A or B in response to the polarity of an input data. Thus, an offset voltage of the balanced operational amplifier is stored as a potential to contacts 1 and 2. In executing a D/A conversion, the S3, S4 are opened and the switch corresponding to the input data is changed over to a contact not for the contact used at the reset period. Then this voltage change decreases or increases respectively the potential of the contacts 1, 2. Since the input and output of the amplifier is tied with a capacitor having a capacitance of 16C, the output is changed for a voltage cancelling the said change.


Inventors:
YUGAWA AKIRA
Application Number:
JP16049984A
Publication Date:
February 25, 1986
Filing Date:
July 31, 1984
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03M1/74; H03M1/00; (IPC1-7): H03M1/74
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)