Title:
デジタル遅延バッファ及びこれに関連する方法
Document Type and Number:
Japanese Patent JP4673697
Kind Code:
B2
Abstract:
A digital delay buffer may be provided with both a fast processing, small capacity memory section and a slow processing, large capacity memory section. The use of two memory sections allows the buffer to generate an aligned data stream with n-bit block level latencies from a plurality of delayed data portions, even if one of the portions is subjected to an undue delay.
Inventors:
Narayanan Bascaran
Richard Jay Dipascal
Jeffrey Robert Town
Gerry Alan Turner
Richard Jay Dipascal
Jeffrey Robert Town
Gerry Alan Turner
Application Number:
JP2005227356A
Publication Date:
April 20, 2011
Filing Date:
August 05, 2005
Export Citation:
Assignee:
Alcatel-Lucent USA Inc.
International Classes:
H04L13/08; H04J3/00; H04J3/06
Domestic Patent References:
| JP7262086A | ||||
| JP5298122A | ||||
| JP3064228A | ||||
| JP8202595A |
Foreign References:
| US5461622 | ||||
| WO2003094479A1 |
Attorney, Agent or Firm:
Masao Okabe
Nobuaki Kato
Kazuo
Okabe
Shinichi Usui
Takao Ochi
Teruhisa Motomiya
Asahi Shinmitsu
Katsumi Miyama
Nobuaki Kato
Kazuo
Okabe
Shinichi Usui
Takao Ochi
Teruhisa Motomiya
Asahi Shinmitsu
Katsumi Miyama