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Title:
DIGITAL FM DEMODULATOR
Document Type and Number:
Japanese Patent JPS62136907
Kind Code:
A
Abstract:

PURPOSE: To improve the S/N of a demodulated FM signal by using n-set of counters so as to count clock pulse numbers plural half periods shifted at an interval of a half period independently based on a half period of the FM signal thereby prolonging the count time.

CONSTITUTION: A zero cross detector 1 outputs a zero cross detection signal every time a carrier of the FM signal passes through a zero point. The signal is frequency-divided by a frequency divided 2, waveform-shaped and outputted as pulses shifted at an interval of a half period of the carrier and generated at each period. The pulses R1, R2 reset the two counters 3, 4 in timings shifted by a half period each, the count for one period of the counters 3, 4 is read in the timings shifted by a half period each by using the pulses R1, R2, the result is fetched in registers 5, 6, and an RS flip-flop is set/reset by the pulses. The counters 3, 4 count number of clock pulses included in the time for one period shifted by a half period each in the carrier of the FM signal and the contents are shifted by a half period each.


Inventors:
SASAKI MIKIO
SOBASHIMA AKIRA
Application Number:
JP27719685A
Publication Date:
June 19, 1987
Filing Date:
December 10, 1985
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03D3/00; H03K9/06; (IPC1-7): H03D3/00; H03K9/06
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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