PURPOSE: To simplify a test pattern and to reduce a testing time by making an RS flip flop into an RS flip flop with a preset input end providing a terminal for control in order to prepare an input gate circuit as a gate circuit for three inputs and controlling an internal state with a control signal.

CONSTITUTION: A first and a second input gate circuits 1a and 1b are respectively constituted with NAND circuits of three inputs and a first and a second control terminals T5 and T6 for control gates are respectively connected to the third input terminal of the NAND circuits of three inputs. The first and the second RS flip flops 2a and 2b are respectively constituted with the RS flip flops with preset input end and a third control terminal T7 is connected to the preset input end so that the control signals are respectively impressed on the control terminals T5∼T7 to control the internal state. By adding the control signals in low level to all the control terminals T5∼T7, the internal state is decided intently independent of the input signals R and V.