PURPOSE: To provide a digital PLL circuit which can increase the converging speed with high stability.

CONSTITUTION: A digital PLL circuit is provided with a frequency difference counting circuit 1 which digitally outputs the frequency difference with a reference clock input and the output of a voltage control oscillator 3 used as the inputs, a D/A converter 2 which outputs an analog signal according to the frequency difference, the oscillator 3 which uses the output of the converter 2 as a control signal input, and a reference clock source 21 which prescribed the counting penod of a frequency counting circuit serving as a part of the circuit 1.