Title:
DIGITAL SERVO SYSTEM
Document Type and Number:
Japanese Patent JPS59128607
Kind Code:
A
Abstract:
PURPOSE:To form a digital servo system resisting disturbance by setting up respective sampling frequency and clock frequency of the 1st and 2nd modes with a prescribed relation. CONSTITUTION:The sampling frequencies fS1, fS2 in the recording and reproducing modes which are to be impressed to a latch pulse forming circuit 26 and a preset pulse forming circuit 22 are set up to fS1>fS2. The sampling frequencies fS1, fS2 and the clock frequencies fCK1, fCK2 in the recording and reproducing modes which are to be impressed to a phase comparing counter 11 are set up to fS1/fS2=fCK1/fCK2. Said setting of the parameters makes it possible to improve the responsiveness of the servo system and form the system resisting disturbance.
Inventors:
MURASE ATSUSHI
HASHIRANO MASARU
HASHIRANO MASARU
Application Number:
JP368483A
Publication Date:
July 24, 1984
Filing Date:
January 12, 1983
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G05B11/36; G05B7/02; G05B21/02; G11B15/467; (IPC1-7): G05B7/02; G05B11/36; G11B15/46
Domestic Patent References:
| JPS5781606A | 1982-05-21 | |||
| JP46014925A | ||||
| JPS508980A | 1975-01-29 | |||
| JPS54124174A | 1979-09-26 | |||
| JPS56101209A | 1981-08-13 |
Attorney, Agent or Firm:
Yoshihiro Morimoto
Previous Patent: JPS59128606
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