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Patent Searching and Data


Title:
DIGITAL SIGNAL GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JPS6276327
Kind Code:
A
Abstract:

PURPOSE: To reduce number of components by inserting an isolator on the way of a data line through which a serial signal is sent so as to use only three isolators even when number of signal lines through which a parallel signal is outputted.

CONSTITUTION: When a 4-bit signal is inputted sequentially to a shift register 13a via an isolator 6 from a data line 10, the 4-bit signal is shifted at each input of a clock signal 11 and the 4-bit signal is held in the shift register 13a. When one-bit signal is outputted from the data line 10, the signal is shifted to next shift registers 13b, 13c. When data are set to the shift registers 13a∼13c, a 4-bit BCD signal is outputted from the shift registers 13a∼13c through signal lines 7a∼7l by using a strobe signal 12.


Inventors:
NEGISHI HIDEKI
IDA TOSHIKAZU
Application Number:
JP19958185A
Publication Date:
April 08, 1987
Filing Date:
September 11, 1985
Export Citation:
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Assignee:
CHINO CORP
International Classes:
H03M9/00; (IPC1-7): H03M9/00
Domestic Patent References:
JPS5877321A1983-05-10
Attorney, Agent or Firm:
Nishimura Norimitsu