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Patent Searching and Data


Title:
DIGITAL SIGNAL REPEATING DEVICE
Document Type and Number:
Japanese Patent JPS5958946
Kind Code:
A
Abstract:

PURPOSE: To improve the reliability of a device and to lower cost, by controlling a selector in a repeater transmitting/receiving a digital signal, and changing simply a transmission clock and a synchronizing clock so as to eliminate the readjustment of the clock by a coil and a capacitor.

CONSTITUTION: A binary signal RUNI outputted from a bipolar/unipolar code converter is inputted to a phase comparator 200 comprising AND gates 12, 13 and an inverter 11. An output RD1 of the AND gate 12 is inputted to a low pass filter 201. Further, an output RD0 of the AND gate 13 is inputted to a low pass filter 202. Moreover, the output of the low pass filters 201, 202 is inputted respectively to an amplifier 23 amplifying the phase difference via resistors 20 and 21, and the amplified output signal is converted into a timing clock having a prescribed frequency inputted to a voltage controlled oscillator (VCO)24.


Inventors:
KONISHI KUNIYOSHI
Application Number:
JP16910982A
Publication Date:
April 04, 1984
Filing Date:
September 28, 1982
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
H04L25/52; H04L7/033; (IPC1-7): H04L25/52
Attorney, Agent or Firm:
Kiyoshi Inomata